AIWA CDC-X447MYU
Instrukcja Serwisowa

IC, LC75374E Pin No.
1 2

Pin Name
RVR IN R COM

I/O
I �

Description
4dB volume control input. Must be driven at a low impedance. 1dB volume control common pin. For the connection of capacitors that compensate for bass and treble in the tone control circuits.

3~5

RT1 ~ RT3

�

A high-frequency compensation capacitors must be connected between RT1 and RT2. A low-frequency compensation capacitors must be connected between RT2 and RT3.

6 7 8 9 10 ~ 11 12 13 14 15 16 17 18

RT OUT RS IN NC NC RSB1 ~ RSB2 FR IN FR OUT

O I � � � I O

Tone control output. Super bass input. Must be driven at a low impedance. Connected to GND. Not connected. For the connection of RCH super bass compensation capacitors. Fader input. Must be driven at a low impedance. Fader output. The front and rear sides can be attenuated independently. GND. Serial data and clock input for control. Chip enable. Data is written in the internal latch when the chip enable signal goes "L" from "H", and each analog switch is activated. Data transfer is enabled at "H". Generates a 1/2VDD power source. A capacitor must be connected between VREF and GND as a troubleshooting against power ripples. Fader output. The front and rear sides can be attenuated independently. Fader input. Must be driven at a low impedance. For the connection of LCH super bass compensation capacitors. Not connected. Connected to GND. Super bass input. Must be driven at a low impedance. Tone control output. For the connection of capacitors that compensate for bass and treble in the tone control circuit.

RR OUT VSS CL I DI CE � �

19 20 21 22 23 ~ 24 25 26 27 28

VREF RL OUT

�

O FL OUT FL IN LSB2 ~ LSB1 NC NC LS IN LT OUT I � � � I O

29 ~ 31

LT3 ~ LT1

A high-frequency compensation capacitors must be connected between LT1 and LT2. A low-frequency compensation capacitors must be connected between LT2 and LT3.

32 33 34 35 36 37 38 39

L COM LVR IN LSELO AUX(L) CD(L)

� I O

1dB volume control common pin. 4dB volume control input. Must be driven at a low impedance. Input selector output pin.

I TUN(L) TP(L) VDD �

Signal input pins.

Power supply.

� 21 �