SONY DNW-75P VOLUME 3
Instrukcja Serwisowa

Circuit Description

(1) Video Signal Processing System (CP-334, DEC-110, SDI-41/41C, and VPR-47 Boards)
Recording system (DNW-75/75P only) The inputted analog composite video signal and the inputted analog component video signal from the VIDEO INPUT connectors are sent from the CP-334 board to the DEC-110 board and converted from analog to digital. After that, the analog composite video signal is converted into a digital component signal (parallel) by the composite decode block, and the analog component video signal into a digital component signal (serial) by the multiplexer. Only the digital component signal selected as a video input signal is sent from the DEC-110 board to the input TBC block on the SDI-41 board. The inputted SDI signal from the SDI INPUT connector is inputted to the SDI-41 board and converted from serial to parallel. After that, in an SDI decode block, an SDI video signal is extracted, and EAV, SAV, video index, etc are detected. The SDI video signal is also sent to the input TBC block on the SDI-41 board. The input TBC block on the SDI-41 board makes an input video signal (the SDI video signal or the digital component signal from the DEC-110 board) synchronize with the reference internal clock of this unit. The input video signal output from the input TBC block is sent to the VPR-47 board through setup remove and VITC generation blocks. The setup remove block removes a setup level only when an input video is in the 525/60 mode. The VITC generation block reads VITC and sets data for recording. The input video signal sent to the VPR-47 board is sent through a frame control block to the DPR-118 board as REC data. The input video signal is also sent to the video processing block as EE data (E-E video signal). Playback system A Betacam SX video PB signal is reconstructed on the DPR-118/118C board. After that, the signal is sent to the video processing block through a video jog processing block. The video jog processing block converts the signal sent intermittently in the VAR/JOG PB mode into a continuous signal. (In DNW-75/75P, the E-E video signal is also input to the video processing block.) The SX video PB signal (signal output from the video jog processing block) is also input to the freeze memory block. The video data memorized in the freeze memory block is read in the freeze mode and input to the video processing block. Each processing (gain adjustment, chroma phase adjustment, blanking addition, and line adder) is performed in the video processing block. The obtained information is sent to an encode block as the PB video signal (digital component video signal). In an encode block, the inputted the PB video signal is converted into the component signal data and the composite-encoded data, then output as the analog video output signals. In the 525/60 mode, setup processing is also carried out in the encode block. These output data is converted from digital to analog and output from each VIDEO OUTPUT connector on the connector panel (CP-334 board) as an analog component signal and analog composite signal. The analog composite output signal has three lines. Characters can be superimposed* on one (VIDEO OUTPUT COMPOSITE 3) of the lines. The analog component output signal has only one line. No characters can be superimposed on the line. In the encode block, the input PB video signal is also output to the SDI encode block on the SDI-41/41C board as the digital component signal so that it is used for the SDI output signal. The digital component video signal for SDI output is multiplexed with 4-channel audio signals by the SDI encode block and converted from parallel to serial. The converted signal is then output from the SDI OUTPUT connectors on the connector panel as the SDI signal. The SDI output signal has three lines. Characters can be superimposed* on one (SDI OUTPUT 3) of the lines.
*

: The characters that are superimposed on the both lines are the same. 2-3 (E)

DNW-75/75P DNW-65/65P