PANASONIC KXTVS50
Instrukcja Obsługi

System reset uses the power monitor IC to monitor the +5 V power supply to the main board. If the supply voltage reaches 4.75 V or above, after a time lag of approximately 180 ms due to the time constant of the R.C., the reset signal is changed from L -> H (RSTn). This signal is received by IC136, then input to the CPU (IC101), flash memory (IC102), RTC (IC128), the flash memory card (master) and the flash memory card (slave). To prevent current intake, IC136 uses the CMOS IC. Simultaneously, the reset signal (RST) inverted at IC109 is input to DSP IC120A (Ach), DSP IC120B (Bch), and gate array IC125. KX-TVS50-1 Reset IC Expanded Time Calculation Expanded time (tPLH) = CI � RL � (In (Vcc ÷ (Vcc - (Vs CPU + 0.2)))) + 0.04(ms) CL: F RL: k Voltage: V Vs CPU: CPU reset threshold voltage

Measured Value Graph 1

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