SONY SCPH-100
Instrukcja Serwisowa

SECTION 4 BLOCK DIAGRAM
4-1. OVERALL BLOCK DIAGRAM (PM-41 (-11/-21/-31/-41/-51/-61) BOARD)

Reproduction prohibited

PM-41 BOARD (-11/-21/-31/-41/-51/-61)
NTSC 53.693175MHz PAL IC106 DRAM 16Mbit 53.203425MHz

(-11/-21/-31/-41/-51) NTSC 3.58MHz PAL 4.43MHz

NTSC 14.318182MHz PAL 17.73447MHz

IC201 SG-RAM 32

X'TAL

IC204 PLL 32

MAIN BUS 32

IC203 GPU

IC502 VDAC + RGB ENCODER CN502 AV MULTI OUT 12PIN IC405 AUDIO AMP DIG 3.3V IC205 2.5V REGULATOR DIG 2.5V

(-61) CN102 17PIN 67.7376MHz IC103 CPU IC203 GPU + SG-RAM

16 CN101 17PIN

SUB BUS

8

16

MOT7.5V J001 DC JACK 7.5V IN EIAJ TYPE-3 IC601 5V REGULATOR IC602 3.5V REGULATOR CTR7.5V

IC102 BOOT ROM 4Mbit

IC304 MECHA-CON

IC732 CD DSP +DIGITAL SERVO +CDROM DECODER +SPU

16

IC310 4Mbit DRAM

AUD5V, VID5V, DIG5V SER3.5V (-21) IC722 MOTOR DRIVER IC723 RF AMP

IC606 3.5V REGULATOR

DIG3.3V CTR3.3V (-31/-41/-51/-61)

IC607 3.5V REGULATOR

DIG3.3V CTR3.3V CN701 4PIN CN702 16PIN

4-1

4-2