AIWA SDDV50
Instrukcja Serwisowa

IC, TA2020-020 Pin No.
1,5,15 2,8 3 4 6 7 9,12 10,13

Pin Name
NC +5INA, +5INB AGND1 REF OVERLOAD AGND2 VP1,VP2 IN1,IN2

I/O
O I I Not connected. Digital +5V, analog +5V. Analog ground. Reference resistor.

Description

A logic low output indicates the input signal has overloaded the amplifier. (Not used) Analog ground. Input stage feedback drive. Single-ended inputs. When set to logic high, both amplifiers are muted and in low power (idle) mode.

11

MUTE

I

When low (grounded), both amplifiers are fully operational. If left floating, the device stays in the mute mode. Ground if not used.

14 16 17 18 19,28 20 21 22,25 23 24 26 27 29 30 31,32

V2DG GNBATTM SLEEP FAULT PGND2,PGND1 DGND OUTP2+ VDD2,VDD1 OUTP2OUTP1OUTP1+ VDDA CPUMP +5GEN DCAP2,DCAP1

I O O O O O O -

Bias stabilization capacitor. Analog ground. When set to logic high, device goes into low power mode. If not used this pin should be grounded. A logic high output indicates thermal overload, or an output is shorted to ground or another output. Power ground (High current). Digital ground. Bridged output. +13.5V power (High current). Bridged output. Bridged output. Bridged output. Analog +13.5V. Charge pump output capacitor. Regulated +5V source used to supply power to pins 2 & 8. Charge pump switching capacitor.

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