|
Kto jest w sklepie?
Sklep przegląda 5483 gości
|
Kategorie
|
Informacje
|
Polecamy
|
|
|
|
|
Dla tego produktu nie napisano jeszcze recenzji!
;
Dokładna dokumentacja, pomogła w szybkiej naprawie telewizora. Dziękuję!
;
jedyne do czego mogę mieć zastrzeżenie to jakość zdjęć zawartych w przesłanej instrukcji serwisowej ponieważ są fatalnej jakości, praktycznie nieczytelne. tak poza tym jestem zadowolony to jest to czego szukałem.
;
Wszystko w porządku.
Instrukcja czytelna i kompletna.
Dziękuję.
all right!
thank you.
;
Bardzo dobra instrukcja. Zawiera wszystko co potrzeba, polecam!
;
Instrukcja jest OK. Schematy czytelne, opisane niektóre procedury.
Alignment and Adjustments
5. Output Circuit The voltages, which are detected form an error detection circuit of PWM IC (Differential AMP) and Dead Time, each is applied to PWM conparator . Due to these detection coltages, Q1, Q2 (Output TR) parallel operate. Q482 (External TR), however, functions as a buffer; natches inpedance between the output port of PWM IC and the final output TR(IRFS640). The PWM pulse (applied to the final output FET (IRFS640 GATE) varies the IC current of high voltage TR(Q473) by adjusting the load impedance of starage Trans (T431). Due to this variation of current, the gain for Q473 emitter pulse changes T444(FBT)makes this emitter pulse became high voltage. Such change keeps both dynamic and static changes fixed. The output waveform of high valtage TR emitter is as shown in the figure below.
about 1V. A PWM modulation type REG detects static, dynamic high voltage fluctuation for only Ton Time (when the current of the output TR collector flows) each 1H, and modulates the width of PWM pulse. So, this PWM type has better improvement in the characteristic of high voltage REG as compared to the existing type.
High Voltage Drive Base Current
GND Ton Toff
GND
PWM Variation tange
PWM Input Waveform of FET GATE
8. Application Effects 1) Improvement of horizontal size fluctuation 2) Linearity improved 3) Embodiment of X-ray protection circuit The figures below show characteristics when a PWM high voltage REG circuit is applied.
6. Paraneters according to beam
High Voltage
To maintain the set high voltage value (31kV), parmaters such as +Ve (DC), Vcp High Voltage change (See the table below).
Parameters Width of FET Gate Pulse + Ve (DC) Vcp High Voltage
Beam
Factor of high voltage change Beam (High voltage Beam (High voltage
High Voltage OFF High Voltage REG ON
) )
BLACK WHITE
7. Response Waveform To reduce unstable high voltage fluctuation, the existing high voltage type REG circuit controls dynamic fluctuation by using C-block capacitor. But, it can't detect actual dynamic fluctuation. Also, its velocity of response to static fluctuation is late because +B power supply changes per
PWM type When a Toshiba Pattern is recrived, the screen is displayed as shown in figute side Existing type
2-34
Samsung Electronics
|
|
|
> |
|